EPFL featured in ISCA 50th anniversary research retrospective
Computer code © iStock / EPFL 2023
IC professors, collaborators and former EPFL PhD students have been showcased in a volume of retrospectives on research into computer architecture.
The International Symposium on Computer Architecture is the premier forum for new ideas and experimental results in computer architecture, with this year marking the Symposium’s 50th anniversary.
As part of the celebrations, significant and memorable papers from 1996 through to 2020, telling a story of how research at ISCA has progressed over those twenty-five years, were selected for a 50th anniversary volume of articles, each accompanied by a retrospective from the authors.
Published in 2015, ShiDianNao: shifting vision processing closer to the sensor, pioneered AI acceleration at the edge. Co-authored by Professor Paolo Ienne, head of the Processor Architecture Laboratory, the paper focuses on image applications, arguably the most important category among recognition and mining applications, and Convolutional Neural Networks which are state-of-the-art for these applications. The authors propose such a CNN accelerator, placed next to a CMOS or CCD sensor. The removal of all DRAM accesses combined with a careful exploitation of the specific data access patterns within CNNs allows them to design an accelerator which is 60 times more energy efficient than the previous state-of-the-art neural network accelerator.
Another, A reconfigurable fabric for accelerating large-scale datacenter services, known as the Catapult paper, described a pioneering use of FPGAs to accelerate computation in the cloud. Co-authored by EPFL Professor James Larus, head of the Very Large Scale Computing Laboratory, it described the medium-scale deployment of a composable, reconfigurable fabric to accelerate portions of the Microsoft Bing search engine that improved the computational capabilities, flexibility, power efficiency, and cost of this fundamental service.
The third is Scale-out processors with IC alumni Pejman Lotfi-Kamran as the lead author introduces the first generation of cloud-native CPUs. Other EPFL authors included Professor Falsafi, Boris Grot, Mike Ferdman, Stavros Volos, Onur Kocberber, Almutaz Adileh and Djordje Jevdjic. Based on a metric of performance-density, the authors present a framework to optimize the amount silicon required in a server CPU to support software services in the datacenter while maximizing throughput and maintaining end-to-end service latency guarantees. This research created the blueprint for an ARM-based server CPU, Cavium ThunderX.
Also included in the volume of retrospectives, co-authored by Professor Babak Falsafi director of the Parallel Systems Architecture Lab, is Dead-block prediction & dead-block correlating prefetchers, a paper published in 2001 that targeted bridging the growing performance gap between processors and memory (known at the time as the "Memory Wall"). It proposes CPU predictors that accurately identify ‘when’ a memory block on-chip becomes evictable and ‘what' subsequent memory block to prefetch and hide long memory access latency. The lasting impact of this work has been to inspire memory streaming technologies called temporal streaming that have appeared in products including IBM BlueGene/Q and ARM Neoverse N2.
Finally, Memory system characterization of commercial workloads, published in 1998, led the community to revisit server design. Co-authored by Professor Edouard Bugnion, who leads the Data Center Systems Laboratory, it presented a detailed performance study of three important classes of commercial workloads: online transaction processing, decision support systems and Web index search, identifying a set of simplifications that make these workloads more amenable to monitoring and simulation without affecting representative memory system behavior.
The final number of papers selected was 98, more than twice than in the Symposium’s previous retrospective, reflecting the growth of the computer architecture research community in the past 25 years. Close to 5% of this computer architecture research is related to EPFL and organizers hope this year’s retrospective volume is an exciting read for older and younger generation of computer architects alike.