Andrea Ruffino receives a Predoctoral Achievement Award

© 2021 EPFL

© 2021 EPFL

Andrea Ruffino, student in the Laboratory of Quantum Architecture in the School of Engineering has been awarded a Predoctoral Achievement Award by the Solid-State Circuit Society (IEEE SSCS).

Andrea Ruffino is one of the 23 students who received the IEEE SSCS Predoctoral Achievement Award. This $1,000 grant and reimbursement for registration fees to virtually attend all five Virtual SSCS sponsored conferences in 2021 are intended for the most promising students in the field of electrical circuits.

Applicants must be members of the IEEE and the Solid-State Circuits Society and have completed at least one year of study in a PhD program in the area of solid state circuits. Awards are made on the basis of academic record, quality of publications, and a graduate study program well matched to the charter of SSCS.

© 2021 EPFL

Andrea Ruffino (Graduate Student Member, IEEE) received the B.Sc. degree (cum laude) in Engineering Physics from Politecnico di Torino, Turin, Italy, in 2013, and the triple joint M.Sc. degree (cum laude) in Micro and Nanotechnologies for Integrated Systems from Politecnico di Torino, Institut National Polytechnique de Grenoble (INPG), Grenoble, France, and École Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland, in 2015. From 2015 to 2016, he was with Hypres, Inc., Elmsford, NY, USA, working on the design of superconducting readout circuits in rapid single flux quantum (RSFQ) technology for superconducting nanowire detectors. In 2016, he joined EPFL, where he is currently pursuing the Ph.D. degree in cryogenic CMOS electronics for qubit readout and control, focusing on single-chip cryo-CMOS transceivers for scalable silicon quantum computers. His work resulted in publications at the IEEE Radio-Frequency Integrated Circuits (RFIC) Symposium, International Solid-State Circuits Conference (ISSCC) and Journal of Solid-State Circuits (JSSC). He was among the Best Student Paper finalists at the RFIC Symposium 2019 and he is a recipient of the IEEE Solid-State Circuits Society Predoctoral Achievement Award for 2020-2021. His current research interests include analog and RF integrated circuit design, cryogenic CMOS electronics for quantum computing applications, superconducting electronics and sensors.

Andrea Ruffino'sThesis

Cryogenic CMOS Integrated Circuits for Scalable Readout of Silicon Quantum Computers

Quantum computers (QCs) are machines, whose computational power can have an exponential speed-up with respect to classical computers for certain problems. The fundamental computational unit of a QC is the quantum bit or qubit; a device that relies on quantum phenomena, such as superposition and entanglement, to realize quantum operations. Solid-state implementations of qubits are the most promising to realize a scalable QC, among them spin qubits in silicon and superconducting qubits in dedicated substrates.

To operate in the quantum regime, a qubit requires very low temperatures, from 10 milliKelvin to 5 Kelvin, some 268 degrees Celsius below zero. To achieve these temperatures, researchers use dilution fridges and the electronics required to read and control qubits is normally implemented as room temperature, as scientific instruments wired through cables to the fridge. This approach is only feasible for a small number of qubits, but it is not scalable. To achieve thousands of qubits, a more compact, possibly integrated approach, operating at cryogenic temperatures, is required.

In the thesis, the readout and control electronics is proposed to be integrated on chip and operated directly at cryogenic temperatures using cryogenic CMOS circuits, working near the qubits and potentially even co-integrated with them. In particular, the thesis proposes the first quantum-classical matrix integrating silicon quantum dots in CMOS standard technology with a classical interface formed by a random-access architecture of transistors and resonators, operating at 50 milliKelvin and allowing time- and frequency-multiplexed readout in a gate-based radio-frequency reflectometry scheme. This is followed by the first cryogenic CMOS circulator and the first fully-integrated low-noise receiver with low-noise amplifier and frequency synthesizer operating at 6 GHz and 3.5 Kelvin for scalable multiplexed readout of silicon quantum dots. The proposed platform covers the whole span from the quantum layer to the room-temperature interface with a scalable architecture, and could form the core of future silicon quantum computers.